Voltage regulator (AVR) is specially designed for AC brushless generator with matching base wave, harmonic compound excitation or permanent magnet generator excitation (PGM system).
The voltage regulator realizes the automatic adjustment of the output voltage of the generator by controlling the excitation current of the alternating current exciter of the generator. Generator voltage regulator can be used for normal 60/50Hz and mid-frequency 400Hz single-machine or parallel-running generators.
It is important to minimize the output ripple and transient of the switch regulator, especially when supplying power to noise-sensitive devices such as high-resolution ADC, the output ripple will appear distinctly spurious in the ADC output spectrum.
To avoid reducing signal-to-noise ratio (SNR) and stray-free dynamic range (SFDR) performance, switch regulators are usually replaced by low-pressure differential regulators (LDOs), sacrificing the high efficiency of switch regulators in exchange for cleaner LDO output. Understanding these artifacts will enable designers to successfully integrate switch regulators into more high-performance, noise-sensitive applications.
Output ripple and switch transient depend on the regulator topology and the value and characteristics of external components.
Output ripple is the residual AC output voltage, which is closely related to the switch operation of the regulator. Its base frequency is the same as the switch frequency of the regulator. Switch transient is a high frequency oscillation that occurs during switch switching. Their magnitude is expressed in terms of the maximum peak voltage, which is difficult to measure precisely because it is highly correlated with the test settings.
The inductance and output capacitance of the regulator are the main components that affect the output ripple. Smaller inductance produces faster transient response at the expense of larger current ripple; A larger inductance makes the current ripple smaller at the expense of a slower transient response. The output ripple can be minimized by using a low effective series resistance (ESR) capacitor.